he two largest spurious signals of concern in a direct RF sampling architecture
are the second harmonic distortion (HD2) and third harmonic distortion (HD3).
These spurs can occur within a single Nyquist zone of the ADC , or they could
alias, or wrap around, an adjacent Nyquist zone and come back into the desired
band. Two examples illustrate this concept. A high speed ADC with a sample rate
of 6 GSPS has a first Nyquist zone from DC to 3 GHz, and a second Nyquist zone
from 3 GHz to 6 GHz. An input sine wave at a carrier frequency of 800 MHz would
create an HD2 product at 1.6 GHz and an HD3 product at 2.4 GHz—in this case, the
input tone, HD2, and HD3 are all in the same Nyquist zone.
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For the second case,
increase the carrier frequency from 800 MHz to 1.8 GHz. Now the HD2 product
would fall at 3.6 GHz, and the HD3 product would fall at 5.4 GHz—both of which
are in the second Nyquist zone. These HD2 and HD3 products will alias to the
first Nyquist zone at 2.4 GHz and 600 MHz, respectively. The HD2 product alias
in the first Nyquist zone will occur at 2.4 GHz, and the HD3 product alias in the
first Nyquist zone will occur at 600 MHz. What is interesting in the second use
case is that now the HD2 and HD3 products are both above and below the desired
tone. Optimizing this frequency planning is critical for the direct RF sampling
architecture and engineer
tone 1800 mhz
-------------------------------
HD2 product would fall at 3.6 GHz,
HD3 product would fall at 5.4 GHz
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HD2 and HD3 products will alias to the
first Nyquist zone at 2.4 GHz and 600 MHz,
hat is interesting in the second use
case is that now the HD2 and HD3 products are both above and below the desired
tone.
600mhz -Tone 1800mhz -2400 mhz -3600 mhz-5400mhz
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For a direct RF sampling archi-
tecture, this question can be interpreted as “how much instantaneous bandwidth
can I achieve while avoiding HD2, HD3, and their alias products?”
s reviewed, oversampling is important for spurious planning, but it is equally
important for noise performance. In a heterodyne receiver, where the ADC sample
rate is well matched to the required bandwidth, the noise performance of the
data converter directly maps to the noise performance of the receiver
https://www.analog.com/media/en/technical-documentation/tech-articles/considering-gsps-adcs-in-rf-systems.pdf The IIP3 of the AD9082 is greater than 10 dB higher than the NF of the device. This
is a critical aspect of dynamic range, indicating that the device is capable of with-
standing very large interfering signals while still detecting smaller desired signals.
As a point of reference, a high performance mixer often has an NF of ~10 dB and an
IIP3 of >20 dBm, also showing a >10 dB gap between the two specifications.
For spurious and noise planning, it makes sense to show the charts together.
Figure 2 shows the SFDR and SNR plot for the AD9082 for a 1.2 GHz single-tone input
For all decimation settings above 8× the SFDR
of the AD9082 is roughly 100 dB or higher. The FFTs of the first and last data
point show this increase in performance. Proper frequency planning results in
the HD2, HD3, and other spurious products to fall out of band of the desired tone
at 1.2 GHz, increasing the SFDR inside of the desired instantaneous bandwidth
6000mhz/(2x8)=375 mhz
SFDR 375 mhz
Tone 1200 mhz band 1012.5 mhz .1387.5 mhz
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AD9082 can be programmed to many modalities. In a wideband mode,
the AD9082 can achieve SNR of ~56 dBFS and SFDR of ~70 dBc, and through a
software reconfiguration to a narrow-band mode the AD9082 can achieve SNR
of ~73 dBFS and SFDR of ~105 dBc. That flexibility between narrow-band and
wideband modes while maintaining best-in-class performance in both is unique
to devices like the AD9082
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Intel/Altera FPGA
https://www.intel.com/content/www/us/en/docs/programmable/683157/current/jesd204c-and-adi-ad9081-ad9082-mxfe.html . JESD204C Intel® FPGA IP and ADI AD9081/AD9082 MxFE* Hardware Checkout Report for Intel® Stratix® 10 E-Tile Devices
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